MULTIPLEXED AMPLIFIER WITH REDUCED GLITCHING

摘要

A first multiplexer (216-1) is coupled to a first input terminal (I??1/???2) and a second multiplexer (216-2) is coupled to a second input terminal (I??1/???2) of a folded cascode differential amplifier (210) which includes transistors (Q1 through Q4) and current sources (222-228). Switching between differential input signals (INP1/INM1) and (INP2/INM2) is controlled through a select signal SELECT provided by a controller (214). A reset mechanism includes a switch (Q5) coupled between output terminals (OUTP, OUTM) of amplifier (210) and controlled by a pulse generator (XOR gate 218 and delay circuit 220). On a rising or falling edge of the select signal SELECT, a pulse is provided to activate the switch (Q5) so as to briefly short the output terminals (OUTP, OUTM). This avoids glitching and results in faster settling times.