| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor element having an arrangement structure capable of high density patterning with ultra-fine width and interval by utilizing a pattern of expressible size in a resolution limit of a photolithographic process, and to provide a patterning method of the semiconductor element. <P>SOLUTION: The semiconductor element comprises a substrate including a memory cell region contiguous to a connection region, a plurality of first conductive lines arranged to extend in the first direction from the memory cell region to the connection region and having a first line width and a first line interval, a plurality of second conductive lines arranged to be connected with the first conductive lines, respectively, and having a second line width and a second line interval, and a plurality of pads arranged in the connection region and connected electrically with the first conductive lines. The patterning method on the semiconductor element may include a two-stage spacer formation step in order to provide ultra-fine line width and interval. <P>COPYRIGHT: (C)2012,JPO&INPIT |
