发明名称 |
INTEGRATED CIRCUIT HAVING A JUNCTIONLESS DEPLETION-MODE FET DEVICE |
摘要 |
The invention relates to a method for producing an integrated circuit (100), comprising at least the following steps in the following order: a) producing at least one electronic MOSD circuit (104) and/or at least one level of electric interconnections (116, 120) on a substrate (102); uniformly implanting dopants in at least a portion of a crystalline semiconductor layer (125); c) thermally activating the dopants implanted in the portion of the crystalline semiconductor layer; d) rigidly connecting the crystalline semiconductor layer to the substrate; and e) producing at least one junctionless depletion-mode FET device (126) including a part (130, 132, 134) of the portion of the crystalline semiconductor layer. |
申请公布号 |
WO2011154360(A3) |
申请公布日期 |
2012.03.08 |
申请号 |
WO2011EP59301 |
申请日期 |
2011.06.06 |
申请人 |
COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIESALTERNATIVES;ERNST, THOMAS;JAUD, MARIE-ANNE;BATUDE, PERRINE |
发明人 |
ERNST, THOMAS;JAUD, MARIE-ANNE;BATUDE, PERRINE |
分类号 |
H01L27/06;H01L21/822;H01L27/115 |
主分类号 |
H01L27/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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