发明名称 DELAY CIRCUIT
摘要 <p>PURPOSE:To control a delay time precisely even in case of IC-implementation by connecting the base of an npn type transistor (TR) to the connection point of a TR which controls the charging of a capacitor and the capacitor and also connecting the emitter of a pnp type TR to the collector, and leading a delayed signal out of the collector. CONSTITUTION:When an input signal IN is inverted from a level '0' to a level '1', the capacitor 12 is discharged to a ground potential point through a TR 14. In this case, the capacitor 12 is discharged with a time constant determined by the base current amplification factor and base current of the TR 14. The delay time TD is determined by the value I/beta obtained by dividing the current I of a constant current source 16 by the base current amplification factor betaof the TR 14 and the value of the capacitor 12. Therefore, the delay time is controlled precisely even in case of IC-implementation.</p>
申请公布号 JPS61216511(A) 申请公布日期 1986.09.26
申请号 JP19850057723 申请日期 1985.03.22
申请人 TOSHIBA CORP;TOSUBATSUKU COMPUTER SYST KK;TOSHIBA MICRO COMPUT ENG CORP 发明人 SHINOHARA SADAO
分类号 H03K5/04;H03K5/13 主分类号 H03K5/04
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