发明名称 DATA PROCESSING DEVICE AND DATA PROCESSING SYSTEM
摘要 A data processing device is provided with: a first power-on-reset circuit (PORa); a second power-on-reset circuit (PORb) that consumes more electricity and has higher reset voltage accuracy than the first power-on-reset circuit; a recording unit (28) that records information for setting the second power-on-reset circuit (PORb) to maintain an active state or set to an inactive state; and a central processing unit (CPU) which is initialized according to the output of the first and second power-on-reset circuits (PORa, PORb), and which sets the information in the recording unit (28).
申请公布号 WO2012026002(A1) 申请公布日期 2012.03.01
申请号 WO2010JP64363 申请日期 2010.08.25
申请人 RENESAS ELECTRONICS CORPORATION;TAKAHASHI, MASARU;ISHIKURA, HIROMICHI 发明人 TAKAHASHI, MASARU;ISHIKURA, HIROMICHI
分类号 G06F1/24;G06F15/78 主分类号 G06F1/24
代理机构 代理人
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