High-speed electronic circuit having a cascode configuration

摘要

A high speed electronic circuit has a cascode circuit configuration and is provided with a bias current source (CS0) between an emitter and a base of a load transistor (Q) in the cascode circuit configuration for compensating a base-emitter voltage (VBE) of the transistor to eliminate an adverse effect of charging and discharging at a stray capacitor (C) which can be connected between the base and the emitter of the transistor. The high speed electronic circuit can be applied to an; circuit, a level shift circuit, a level shift discrimination circuit, a signal distribution circuit, a signal synthesization circuit and a frequency band control circuit.