发明名称 MEMORY SUBSYSTEM AND METHOD THEREFOR
摘要 A memory subsystem and method for loading and storing data at memory addresses of the subsystem. The memory subsystem is functionally connected to a processor and has a first mode of address encryption to convert logical memory addresses generated by the processor into physical memory addresses at which the data are stored in the memory subsystem. The memory subsystem is adapted to pull low a write enable signal to store data in the memory subsystem and to pull high the write enable signal to load data in the memory subsystem, wherein if pulled high the write enable signal alters the address encryption from the first mode to a second mode. The memory subsystem is adapted to be coupled to a local hardware device which supplies a key that acts upon the address encryption of the memory subsystem.
申请公布号 US2012047373(A1) 申请公布日期 2012.02.23
申请号 US201113287476 申请日期 2011.11.02
申请人 RAO G.R. MOHAN;SCHUETTE F. MICHAEL 发明人 RAO G.R. MOHAN;SCHUETTE F. MICHAEL
分类号 G06F12/14;G06F21/00;H04L9/00 主分类号 G06F12/14
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