发明名称 TLP PROCESSING CIRCUIT FOR PCI EXPRESS AND RELAY DEVICE EQUIPPED WITH THE SAME
摘要 A PCI Express TLP processing circuit (10) comprises: a plurality of reception processing sections (2a1); a transmission processing section (2b); and a multiplexer (2c1) that performs transmission to the transmission processing section, selecting one of the reception processing sections; and at least a reception processing section comprises: a redundancy code generating circuit (12); an LCRC/sequential number detection circuit (13); a buffer memory (14); a packet control circuit section (16) that controls transmission for normal transmission to the transmission destination of the TLP in question or for nullifying transmission; and the transmission processing section comprises: a sequential number generating circuit (19); an LCRC generating circuit (20) and a relay circuit error detection circuit (21), whereby data integrity of the transmitted TLP can be guaranteed.
申请公布号 EP2420935(A1) 申请公布日期 2012.02.22
申请号 EP20100764282 申请日期 2010.04.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MURAKAMI, MASAYUKI;TAKEHARA, JUN;ARAMAKI, NARUHIKO;KAWAMURA, TOSHIKAZU;TAKAYANAGI, YOICHO;OKABE, MOTOHIKO
分类号 G06F13/38;G06F13/00;H04L1/00 主分类号 G06F13/38
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