发明名称 Surround gate access transistors with grown ultra-thin bodies
摘要 A vertical transistor having an annular transistor body surrounding a vertical pillar, which can be made from oxide. The transistor body can be grown by a solid phase epitaxial growth process to avoid difficulties with forming sub-lithographic structures via etching processes. The body has ultra-thin dimensions and provides controlled short channel effects with reduced need for high doping levels. Buried data/bit lines are formed in an upper surface of a substrate from which the transistors extend. The transistor can be formed asymmetrically or offset with respect to the data/bit lines. The offset provides laterally asymmetric source regions of the transistors. Continuous conductive paths are provided in the data/bit lines which extend adjacent the source regions to provide better conductive characteristics of the data/bit lines, particularly for aggressively scaled processes.
申请公布号 US8115243(B2) 申请公布日期 2012.02.14
申请号 US201113027154 申请日期 2011.02.14
申请人 FORBES LEONARD;MICRON TECHNOLOGY, INC. 发明人 FORBES LEONARD
分类号 H01L27/108 主分类号 H01L27/108
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