发明名称 CACHE MEMORY
摘要 <P>PROBLEM TO BE SOLVED: To reduce the cost of a system on which a cache memory holding stack data is mounted. <P>SOLUTION: A cache memory has a first way including a first data cache area for storing data and a stack cache area for storing stack data, and a second way including a second data cache area for storing data. A stack hit determination circuit asserts a stack hit signal when the stack cache area holds stack data to be accessed. A mask circuit masks a portion of an access address in order to access the stack cache area with access to the first data cache area disabled during the assertion of the stack hit signal. Therefore, usual data and the stack data can be held in a single cache memory. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012027652(A) 申请公布日期 2012.02.09
申请号 JP20100165137 申请日期 2010.07.22
申请人 FUJITSU LTD 发明人 MORI MASATOSHI
分类号 G06F12/08 主分类号 G06F12/08
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