| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit layout design method which can create a wide dummy metal serving as reinforcing wiring for a power supply. <P>SOLUTION: The semiconductor integrated circuit layout design method of the present embodiment comprises the steps of performing global wiring by using at least one signal wiring layer after cell placement is completed, disposing a virtual dummy metal having a width same as that of a signal wire on a non-wired region of the global wiring with respect to each signal wiring layer used for the global wiring, the region being a minimum square serving as a disposition unit defined by lattice points of a mesh-like power supply wiring, subsequently merging a plurality of virtual dummy metals disposed in continuous regions into one wider virtual dummy metal, and connecting teh merged virtual dummy metal with the mesh-like power supply wiring as reinforcing wiring for a power supply. Then, detailed wiring is performed based on the global wiring and a dummy metal is disposed on a non-wired region of the detailed wiring. <P>COPYRIGHT: (C)2012,JPO&INPIT |
