发明名称 MEDIUM HANDLING DEVICE
摘要 PROBLEM TO BE SOLVED: To access a plurality of memories respectively mounted on a plurality of units and different in capacity by a single CPU.SOLUTION: A bill recycling device 1 includes units U1, U2', U3, and U4-1 to U4-4, memories m1, m2', and m3 to m7, a single CPU 21, and an FPGA 25. The memories m1, and m3 to m7 are respectively mounted on the units U1, U3, and U4-1 to U4-4, and the memory m2' is mounted on the unit U2'. The capacities of the memories m1, and m3 to m7 are 1 k bytes, and the capacity of the memory m2' is 1 M bytes. The CPU 21 accesses the memories m1, m2', and m3 to m7 via a I2C bus 23. The FPGA 25 converts a 1 k memory address output from the CPU 21 into a 1 M memory address during the accessing of the CPU 21 to the memory m2'.SELECTED DRAWING: Figure 7
申请公布号 JP2016118979(A) 申请公布日期 2016.06.30
申请号 JP20140259211 申请日期 2014.12.22
申请人 FUJITSU FRONTECH LTD 发明人 OGAWA TOMOAKI
分类号 G06F12/06;G07D9/00 主分类号 G06F12/06
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