发明名称 VARIABLE DELAY CIRCUIT, RECORDING APPARATUS, AND DELAY AMOUNT CALIBRATION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To eliminate the need for a calibration delay line for calibrating delay amount on a delay line, and to eliminate variation in calibration. <P>SOLUTION: A unit delay amount such as by 1T hour is set during a calibration period such as 9T segment, for a delay line that delays an input signal (edge pulse). A test pulse is superposed on the input signal, and a comparison pulse having the unit delay amount to the test pulse is generated. A phase comparison is performed between the comparison pulse and the test pulse in which the unit delay amount is provided through the delay line, to determine a unit delay control value corresponding to the unit delay amount. The determined unit delay control value is used as a unit delay control value of calibration result for setting a delay amount of the subsequent delay line. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012015828(A) 申请公布日期 2012.01.19
申请号 JP20100150798 申请日期 2010.07.01
申请人 SONY CORP 发明人 ENDO MAKI
分类号 H03K5/135;G11B7/0045;G11B7/1263;G11B7/1267;G11B20/18 主分类号 H03K5/135
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