发明名称 STATE DETECTING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a circuit comprising a smaller number of elements. <P>SOLUTION: The state detecting circuit comprises: a counter circuit 11a for counting a series of first command signals relating to the start of operation control; a second counter circuit 11b for counting a series of second command signals relating to the end of operation control; a counter match detection circuit 12 for detecting a match between count values in the counter circuits 11a and 11b; and an RS flip-flop circuit 13 that is set by the first command signal and is reset when the counter match detection circuit detects a match. The counter circuits 11a and 11b include a binary counter. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012014762(A) 申请公布日期 2012.01.19
申请号 JP20100148588 申请日期 2010.06.30
申请人 ELPIDA MEMORY INC 发明人 SHIMADA SHINTARO;YOSHIDA HIROYASU
分类号 G11C11/4076;G11C11/407 主分类号 G11C11/4076
代理机构 代理人
主权项
地址