发明名称 ARCHITECTURE AND INSTRUCTION SET FOR IMPLEMENTING ADVANCED ENCRYPTION STANDARD (AES)
摘要 A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a“last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a“one round”pass.
申请公布号 US2012002804(A1) 申请公布日期 2012.01.05
申请号 US201113088088 申请日期 2011.04.15
申请人 GUERON SHAY;FEGHALI WAJDI K.;GOPAL VINODH 发明人 GUERON SHAY;FEGHALI WAJDI K.;GOPAL VINODH
分类号 H04L9/28 主分类号 H04L9/28
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