发明名称 STRESS-ENGINEERED RESISTANCE-CHANGE MEMORY DEVICE
摘要 A resistance-change memory device using stress engineering is described, including a first layer including a first conductive electrode, a second layer above the first layer including a resistive-switching element, a third layer above the second layer including a second conductive electrode, where a first stress is created in the switching element at a first interface between the first layer and the second layer upon heating the memory element, and where a second stress is created in the switching element at a second interface between the second layer and the third layer upon the heating. A stress gradient equal to a difference between the first stress and the second stress has an absolute value greater than 50 MPa, and a reset voltage of the memory element has a polarity relative to a common electrical potential that has a sign opposite the stress gradient when applied to the first conductive electrode
申请公布号 US2012001148(A1) 申请公布日期 2012.01.05
申请号 US201113233937 申请日期 2011.09.15
申请人 MILLER MICHAEL;PHATAK PRASHANT;CHIANG TONY;INTERMOLECULAR, INC. 发明人 MILLER MICHAEL;PHATAK PRASHANT;CHIANG TONY
分类号 H01L45/00;H01L21/02;H01L47/00 主分类号 H01L45/00
代理机构 代理人
主权项
地址