发明名称 |
Clock Routing in Mulitiple Channel Modules and Bus Systems |
摘要 |
The terminating module includes integrated circuits and a termination circuit which receive clock signals from the integrated circuit. The integrated circuit includes at least one memory integrated circuit mounted on a printed circuit board. An electrical connector is configured to couple the terminating module to a motherboard. Additionally, the termination circuit includes a resistor. In another embodiment, the terminating module provides a printed circuit board, a memory integrated circuit mounted on the circuit board, a terminator circuit which includes a resistor, and an electrical connector. The electrical connector couples the terminating module to a motherboard. |
申请公布号 |
US2012001670(A1) |
申请公布日期 |
2012.01.05 |
申请号 |
US201113235251 |
申请日期 |
2011.09.16 |
申请人 |
KOLLIPARA RAVINDRANATH T.;NGUYEN DAVID;HABA BELGACEM |
发明人 |
KOLLIPARA RAVINDRANATH T.;NGUYEN DAVID;HABA BELGACEM |
分类号 |
G06F1/04;G06F13/40;G11C5/00;H05K1/02;H05K1/11;H05K1/14;H05K7/06;H05K7/14 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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