发明名称 Data retention flip flop for low power applications
摘要 A disclosed embodiment is a data retention flip flop comprising master and slave circuits that are configured to be turned off when a single sleep mode signal is activated. The disclosed embodiment also comprises an always-on balloon circuit coupled to the master circuit, where the always-on balloon circuit includes a common sub-circuit shared with the master circuit. The master circuit writes into the always-on balloon circuit when the single sleep mode signal is activated, and the master circuit reads from the always-on balloon circuit when the single sleep mode signal is deactivated. The always-on balloon circuits comprises high threshold voltage transistors, while the slave circuit comprises low threshold voltage transistors. The master and slave circuits have no leakage current, or substantially no leakage current, after the single sleep mode signal is activated.
申请公布号 US8085076(B2) 申请公布日期 2011.12.27
申请号 US20080217390 申请日期 2008.07.03
申请人 DJAJA GREGORY;CHANDRASEKHARAN KARTHIK;BROADCOM CORPORATION 发明人 DJAJA GREGORY;CHANDRASEKHARAN KARTHIK
分类号 H03K3/289 主分类号 H03K3/289
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