发明名称 Gate insulating layer thickness measurement
摘要 The capacitance between a conductive layer 20 overlying conductive electrodes 8 (&6) and 12 is measured to determine the thickness of the gate insulating layer 18 which lies between the conductive layer and the electrodes. The capacitive effects of the variability of the overlap between the conductive layer and the electrodes is compensated by subtracting the capacitance value measured between the electrode 12 and the overlying conductive layer 20 from the capacitance value measured between the electrode 8,6 and the conductive layer. The capacitance between the electrode 6 and the overlying conductive layer is largely independent with respect to changes in overlap of the conductive layer 20 with respect to the underlying conductive electrodes 8 & 12. Therefore, the thickness of the gate dielectric layer 18 can be determined accurately.
申请公布号 GB2481002(A) 申请公布日期 2011.12.14
申请号 GB20100009408 申请日期 2010.06.04
申请人 PLASTIC LOGIC LIMITED 发明人 STEPHAN RIEDEL
分类号 H01L21/66;H01L23/544 主分类号 H01L21/66
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