| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a layout verification device and a layout verification method that are capable of verifying breakdown voltage at an intersection between an element and a wire, or at an intersection between wires. <P>SOLUTION: A layout verification device comprises a consistency verification means for verifying consistency between circuit diagram data of a semiconductor integrated circuit and layout data generated based on the circuit diagram data; an extraction means for extracting a pair of an element and a wire or a pair of wires having a positional relationship intersecting each other based on the layout data when the consistency is verified by the consistency verification means; a storage means for storing a reference potential difference as a criterion; a potential difference detection means for detecting a potential difference of the intersection pair based on the circuit diagram data; and a potential difference comparison means for comparing the potential difference of the intersection pair with the reference potential difference. <P>COPYRIGHT: (C)2012,JPO&INPIT |
