| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce circuit scale by enabling a driver to operate with, for example, a commonly used 3.3-volt driving CMOS buffer as a source voltage, and further decreasing the number of output terminals of a clock drive circuit. <P>SOLUTION: A second gate GP2 of a four-terminal scanning thyristor 110 (e.g., 110-1) of the precedent stage is connected to a first gate GP1 of a four-terminal scanning thyristor 110 (e.g., 110-2) of the following stage via a resistance 120. Thus, the scanning direction of a scanning circuit part 100 can be determined even based upon first and second clocks of two phases supplied from a clock drive circuit 70. When the data drive circuit 60 holds a cathode of a three-terminal light emitting thyristor 210 at L level, a voltage is applied between an anode and the cathode. Only a gate of a light emitting thyristor 210 commanded by a scanning circuit part 100 to emit light is selectively held at H level so that the emission-commanded light emitting thyristor 210 is turned on. <P>COPYRIGHT: (C)2012,JPO&INPIT |
