| 摘要 |
An SOI lateral MOSFET device comprises a grooved gate (8) lengthways extending to the dielectric buried layer (2); a dielectric groove (61) formed in the drift region, the dielectric coefficient of the dielectric (6) is less than that of the active layer (3); and a buried gate (7) formed in the dielectric groove (61). In the SOI lateral MOSFET device, on the one hand, the breakdown voltage of the device is improved and the lateral size of the device is minified; and on the other hand, the effective longitudinal conduction region of the device is increased via the grooved gate; at the same time, the channel density and the current density are increased via the grooved gate and the buried gate. The on-resistance is decreased so as to reduce the power consumption. The device has the advantages of high voltage, high speed, low power consumption, low cost and convenient integration, and is especially suitable for the power integrated circuit and a radio frequency power integrated circuit. |
