发明名称
摘要 According to one embodiment, an electrical package includes: an external input portion; an external output portion; a plurality of integrated circuits that is compatible with a compressed deterministic pattern test, each of the integrated circuits including: an input portion; a decompressor that is connected to the input portion; scan chains that are connected to the decompressor; a compactor that is connected to the scan chains; a selector that is connected to the compactor and the input portion to selectively output an output of the compactor or an output of the input portion; and an output portion that is connected to the selector.
申请公布号 JP4802139(B2) 申请公布日期 2011.10.26
申请号 JP20070129720 申请日期 2007.05.15
申请人 发明人
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
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