发明名称 |
MULTI-CORE PROCESSOR SYSTEM, CONTROL PROGRAM, AND CONTROL METHOD |
摘要 |
<p>When a process (A-1-1) is allocated to a CPU (CPU#0) and another CPU (CPU#1), a scheduler (111) acquires the priority for the process (A-1-1) and the number of accesses of the processes assigned to each CPU. The scheduler (111) determines whether the priority of the process (A-1-1) is high. The process (A-1-1) is a doacross process, and because doacross processes are dependently related across iterations, the number of accesses to a bus is high, which makes the priority of the process (A-1-1) high. When the scheduler (111) determines that the priority of the process (A-1-1) is high, the scheduler (111) sets an access ratio in accordance with the acquired number of accesses, and notifies an arbitration circuit (102). The arbitration circuit (102) arbitrates the access from CPUs (CPU#0-CPU#7) in accordance with the notified access ratio by using a weighted round robin model.</p> |
申请公布号 |
WO2011118011(A1) |
申请公布日期 |
2011.09.29 |
申请号 |
WO2010JP55287 |
申请日期 |
2010.03.25 |
申请人 |
FUJITSU LIMITED;YAMAUCHI, HIROMASA;YAMASHITA, KOICHIRO;MIYAZAKI, KIYOSHI;IKEDA, HITOSHI |
发明人 |
YAMAUCHI, HIROMASA;YAMASHITA, KOICHIRO;MIYAZAKI, KIYOSHI;IKEDA, HITOSHI |
分类号 |
G06F13/18;G06F12/00 |
主分类号 |
G06F13/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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