| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit that eliminates the hold error of an FF by changing only a wiring pattern even during designing and manufacturing without including a dummy circuit, and to provide a designing method and a manufacturing method therefor. SOLUTION: The semiconductor integrated circuit includes a plurality of standard cells including first and second flip-flop cells. The first and second flip-flop cells have a plurality of transistors arranged in regions of the same size in a common transistor arrangement pattern, and also have wiring in mutually different wiring patterns which interconnect the plurality of transistors to constitute flip-flop circuits, thereby constituting the flip-flop circuits which use at least single transistors of the same size, arranged at identical positions in the respective regions, at different positions of the circuits. COPYRIGHT: (C)2011,JPO&INPIT
|
