发明名称 MEMORY INTERFACE HAVING EXTENDED STROBE BURST FOR WRITE TIMING CALIBRATION
摘要 Methods and systems for calibrating parameters for communication between a controller and a memory device. A memory controller may be configured to calibrate one or more of the write latency and/or the latency window of a memory device such that a data signal and a data strobe signal are received by the memory device within the latency window of the memory device.
申请公布号 US2011225444(A1) 申请公布日期 2011.09.15
申请号 US20100723843 申请日期 2010.03.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GOWER KEVIN C.;KIM KYU-HYOUN
分类号 G06F12/00;G06F1/04 主分类号 G06F12/00
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