Phase-locked loop circuit, semiconductor integrated circuit, electronic device, and control method of phase-locked loop circuit

摘要

A phase-locked loop circuit includes: a phase and frequency comparing section configured to compare a phase of an external reference clock signal with a phase of a comparison clock signal, and generate an error signal corresponding to a result of comparison; an oscillating section configured to generate an internal clock signal of an oscillation frequency corresponding to the error signal; a frequency dividing section configured to generate the comparison clock signal by frequency-dividing the internal clock signal by a predetermined frequency dividing ratio; an oscillator control section configured to generate an oscillation control signal for controlling frequency of the internal clock signal output from the oscillating section on a basis of the error signal; and a frequency divider control section configured to generate a frequency division control signal for controlling a bias current of the frequency dividing section on a basis of the error signal.