发明名称 AUTOMATIC SUSPEND AND RESUME IN HARDWARE TRANSACTIONAL MEMORY
摘要 An apparatus and method is disclosed for a computer processor configured to access a memory shared by a plurality of processing cores and to execute a plurality of memory access operations in a transactional mode as a single atomic transaction and to suspend the transactional mode in response to determining an implicit suspend condition, such as a program control transfer. As part of executing the transaction, the processor marks data accessed by the speculative memory access operations as being speculative data. In response to determining a suspend condition (including by detecting a control transfer in an executing thread) the processor suspends the transactional mode of execution, which includes setting a suspend flag and suspending marking speculative data. If the processor later detects a resumption condition (e.g., a return control transfer corresponding to a return from the control transfer), the processor is configured to resume the marking of speculative data.
申请公布号 US2011209151(A1) 申请公布日期 2011.08.25
申请号 US20100711851 申请日期 2010.02.24
申请人 CHUNG JAEWOONG;CHRISTIE DAVID S;HOHMUTH MICHAEL P;DIESTELHORST STEPHAN;POHLACK MARTIN 发明人 CHUNG JAEWOONG;CHRISTIE DAVID S.;HOHMUTH MICHAEL P.;DIESTELHORST STEPHAN;POHLACK MARTIN
分类号 G06F9/46;G06F12/00 主分类号 G06F9/46
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