| 摘要 |
<p>A whole enclosing gate CMOS field effect transistor is provided, the transistor includes: a semiconductor substrate (100,100'), a NMOS area (300, 300') having a second channel (301,301'), a PMOS area (400,400') having the first channel (401,401') and a gate area (500,500'), the PMOS area (400,400') and NMOS area (300,300') also including a source area and a drain area separately located the two terminal channel; the surface of the first channel (401,401') and the second channel (301,301') whole enclosed by the gate area (500,500'), the first buried insulating layer (201,201') located between the PMOS area (400,400') and the NMOS area (300,300'); the second buried insulating layer (202,202') located between the NMOS area (300,300') or PMOS area (400,400') and the semiconductor area (100,100'). The structure of the whole enclosing gate CMOS field effect transistor is simple, compact, the integrated level is high; the transistor has high current carrier mobility; the poly-silicon gate exhausted and short channel effect are avoided.</p> |
