发明名称 Rail-to-rail data receiver for high-speed communication
摘要 In one embodiment, the present invention includes a receiver having two complementary input sense amplifiers to receive, amplify and latch a differential signal and to output complementary stage differential output signals to a latch coupled to receive and combine the n− them into a latched differential output signal. Other embodiments are described and claimed.
申请公布号 US8000672(B2) 申请公布日期 2011.08.16
申请号 US20070978326 申请日期 2007.10.29
申请人 INTEL CORPORATION 发明人 SUMESAGLAM TANER
分类号 H04B1/06;G11C7/00;H03F3/45 主分类号 H04B1/06
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