发明名称 Semiconductor device with offset stacked integrated circuits
摘要 A semiconductor device where multiple chips of identical design can be stacked, and the spacer and interposer eliminated, to improve three-dimensional coupling information transmission capability. A first semiconductor circuit including a three-dimensional coupling circuit (three-dimensional coupling transmission terminal group and three-dimensional coupling receiver terminal group); and a second semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode (power supply via hole and ground via hole); and a third semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode are stacked on the package substrate.
申请公布号 US7994623(B2) 申请公布日期 2011.08.09
申请号 US20080167228 申请日期 2008.07.02
申请人 HITACHI, LTD. 发明人 NONOMURA ITARU;OSADA KENICHI;SAEN MAKOTO
分类号 H01L23/02;H01L27/00 主分类号 H01L23/02
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