发明名称 Memory chip and semiconductor device using the memory chip and manufacturing method of those
摘要 In a wafer, a plurality of basic chips F is arranged therein. The basic chip F has a memory capacity of i-mega bytes. By dicing, a memory chip including four basic chips F is cut out of the wafer. The memory chip has a memory capacity of 4×i-mega bytes. A dicing line is interposed between four basic chips F configuring the memory chip, Four basic chips F can change word organization by a control signal individually.
申请公布号 US7977159(B2) 申请公布日期 2011.07.12
申请号 US20060369935 申请日期 2006.03.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 URAKAWA YUKIHIRO
分类号 H01L21/00;H01L21/66;G11C5/00;G11C7/10;G11C11/00;H01L21/60;H01L21/78;H01L21/822;H01L21/8242;H01L23/544;H01L25/065;H01L25/07;H01L25/18;H01L27/04;H01L27/10;H01L27/108 主分类号 H01L21/00
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