发明名称 Multiple computer architecture with synchronization
摘要 <p>The present invention discloses a modified computer architecture (50, 71, 72), and a corresponding method, which enables an applications program (50) to be run simultaneously on a plurality of computers (M1, ... Mn). Shared memory at each computer is updated with amendments and/or overwrites so that all memory read requests are satisfied locally. During initial program loading (75), or similar, instructions which result in the application program (50) acquiring (or releasing) a lock on a particular asset (50A, 50X-50Y) (synchronization) are identified. Additional instructions are inserted (162, 163) to result in a modified synchronization routine with which all computers arc updated. The modified computer architecture may be adapted for either single thread, or multiple thread, program implementation.</p>
申请公布号 EP2341430(A1) 申请公布日期 2011.07.06
申请号 EP20110002408 申请日期 2005.04.22
申请人 WARATEK PTY LIMITED 发明人 HOLT, JOHN MATTHEW
分类号 G06F9/46;G06F12/02;G06F15/16 主分类号 G06F9/46
代理机构 代理人
主权项
地址