PARITY GENERATOR AND MAP APPARATUS FOR TURBO DECODING
摘要
PURPOSE: A parity generation apparatus for turbo decoding and a MAP apparatus are provided to improve decoding performance by increasing the amount of information for decoding with small quantity of calculation. CONSTITUTION: A first state matrix calculation part(110) obtains forward and reverse state matrices for an input symbol. A second state matrix calculation part(120) calculates forward and reverse state matrices for parity bits. An information calculation part(130) decodes information bits using the state matrices for the input symbol. A parity calculation part(140) decodes parity bits using the state matrix for the parity bits. The information calculation part and the parity calculation part use an LLR algorithm.
申请公布号
KR20110070778(A)
申请公布日期
2011.06.24
申请号
KR20100115080
申请日期
2010.11.18
申请人
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE