| 摘要 |
This invention is directed to achievement of a gate driver capable of causing a scan signal to fall soon after the termination of a charge time period for each of a plurality of rows. The gate driver comprises two shift registers. An n-th bistable circuit (SR(n)) in the shift registers as a whole (410) outputs, as a scan signal, a status signal (Q) from either one of output nodes (51, 52). A first node (netA), which is connected to the gate terminals of film transistors (T1, T11) used for changing, based on a first clock (CKA), the levels at the output nodes (51, 52), is caused to exhibit an ON-level by inputting, as a set signal (S), a status signal (Q) output from a (n - 2)-th bistable circuit (SR(n - 2)). The output nodes (51, 52) are caused to exhibit an OFF-level by inputting, as a first reset signal (R1), a status signal (Q) output from a (n + 2)-th bistable circuit (SR(n + 2)). The first node (netA) is caused to exhibit the OFF-level by inputting, as a second reset signal (R2), a status signal (Q) output from a (n + 3)-th bistable circuit (SR(n + 3)). |
