发明名称 Dry etching method for semiconductor device
摘要 The present invention provides a device having an N type polysilicon gate and a P type polysilicon gate disposed therein, wherein when both gates are simultaneously etched, they are disposed in such a manner that the area of a non-doped polysilicon gate corresponding to a dummy electrode becomes larger than the total area of the N type and P type doped polysilicon gates, thereby causing non-doped polysilicon to become dominant over doped polysilicon, whereby the polysilicon gates are dry-etched.
申请公布号 US7955963(B2) 申请公布日期 2011.06.07
申请号 US20040798482 申请日期 2004.03.12
申请人 OKI SEMICONDUCTOR CO., LTD. 发明人 TAKAHASHI AKIRA
分类号 H01L21/28;H01L21/3205;H01L21/3065;H01L21/3213;H01L21/8238;H01L23/52;H01L27/092;H01L29/423;H01L29/49 主分类号 H01L21/28
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