发明名称 Semiconductor package and fabrication method thereof
摘要 There is provided a semiconductor package comprising: a multilayer thin film structure including a plurality of dielectric layers and at least one or more redistribution layers; a semiconductor chip positioned at one side of the multilayer thin film structure and electrically connected to the redistribution layer; and a solder bump formed at the other side of the multilayer thin film structure. The multilayer thin film structure functions as the substrate for the semiconductor package and realizes the light, thin, short and small BGA package without any additional substrate. A plurality of the packages can be simultaneously formed at wafer level or carrier level, to simplify the process and to be favorable for mass production. After the semiconductor chips are formed at wafer level, only the semiconductor chips having the excellent operation characteristic through the test are selectively bonded to the multilayer thin film structure, to provide the high quality package products in which the fault rate is maximally reduced. The light, thin, short and small BGA package according to the present invention enables small and slim communication devices, displayers and other diverse electronic devices, to be contributed to the increase of the competitiveness of the products to which the BGA package is applied.
申请公布号 US7952210(B2) 申请公布日期 2011.05.31
申请号 US20080023761 申请日期 2008.01.31
申请人 NEPES CORPORATION 发明人 JUNG GI-JO;KANG IN SOO;KIM JONG HEON;BAEK SEUNG DAE
分类号 H01L23/52;H01L23/48;H01L29/40 主分类号 H01L23/52
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