发明名称 Pixel capacitors
摘要 <p>A method of forming an array of circuitry upon a base substrate 1 comprises forming switching circuitry 3,20,22,24 (e.g. TFT circuitry for an LCD display device) upon the substrate, each switch controlling an overlying pixel conductor element 11. A first insulating layer/region 7 is provided to insulate the circuitry from an electrically conductive screen 8 which is in turn insulated from, but capacitively coupled to, the pixel conductor 11 by the provision of a second insulting layer 9. The screen and insulating layers are furnished with a pattern of through-holes (e.g. 28) through which interlayer connections 10 are formed to connect drain pads 22 (figure 1) with the overlying pixel conductors 11. The patterned screen 8 serves to electrically shield the pixel conductors 11 from conductive elements beneath the screen and is patterned to ensure the overlap between the array of pixel conductors 11 and underlying conductive elements (e.g. 3,20,22,24,26) is constant across the array. The uniform arrangement ensures that capacitative coupling between pixel conductors 11 and underlying conductive elements is minimized and uniform across the entire array. Pixel performance characteristics such as voltage holding ratio and kickback voltage are thereby stabilised across the array and less susceptible to the effects of capacitive coupling.</p>
申请公布号 GB201106047(D0) 申请公布日期 2011.05.25
申请号 GB20110006047 申请日期 2011.04.11
申请人 PLASTIC LOGIC LIMITED 发明人
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