INTEGRATED CIRCUITS AND METHODS FOR FORMING THE INTEGRATED CIRCUITS

摘要

PURPOSE: An integrated circuit and a forming method thereof are provided to reduce a geometrical size by forming a metal layer at the same height as a first surface of an etching stop layer. CONSTITUTION: A gate electrode(103) is formed on a substrate(101). A first dielectric layer(109a) is formed on the gate electrode. An etching stop layer(111a) is formed on the first dielectric layer. An opening is formed through the first dielectric layer and the etching stop layer. A metal layer(150a,150b) in contact with a source/drain region(105a,105b) is formed in the opening. A damascene structure(170) is connected to the metal layer.