发明名称 Method and structures for accelerated soft-error testing
摘要 An integrated circuit, method of forming the integrated circuit and a method of testing the integrated circuit for soft-error fails. The integrated circuit includes: a silicon substrate; a dielectric layer formed over the substrate; electrically conductive wires formed in the dielectric layer, the wires interconnecting semiconductor devices formed in the substrate into circuits; and an alpha particle emitting region in the integrated circuit chip proximate to one or more of the semiconductor devices. The method includes exposing the integrated circuit to an artificial flux of thermal neutrons to cause fission of atoms in the alpha particle emitting region into alpha particles and other atoms.
申请公布号 US7939823(B2) 申请公布日期 2011.05.10
申请号 US20070852353 申请日期 2007.09.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GORDON MICHAEL S.;RODBELL KENNETH P.;TANG HENRY H. K.
分类号 H01L23/58;H01L21/00 主分类号 H01L23/58
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