发明名称 Nonvolatile semiconductor memory including charge accumulation layer and control gate
摘要 A nonvolatile semiconductor memory includes a transistor, a first MOS, a second MOS, a first voltage circuit, and a second voltage circuit. The transistor includes a accumulation layer, a control gate, and a first impurity diffused layer. The first MOS includes a first electrode and a second layer. The second MOS includes a second electrode and a third layer, after the channels being formed, the first MOS and the second MOS being cut off. The first voltage circuit applies a first voltage to an active region to generate a forward bias. The second voltage circuit applies a second voltage, and a third voltage to the control gate of the transistor, after the first voltage circuit charges the first to third impurity diffused layer to the first voltage, the second voltage circuit applying the second voltage and the third voltage to the control gate of the transistor.
申请公布号 US7924620(B2) 申请公布日期 2011.04.12
申请号 US20090543161 申请日期 2009.08.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HONDA YASUHIKO
分类号 G11C16/00 主分类号 G11C16/00
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