| 摘要 |
<P>PROBLEM TO BE SOLVED: To accelerate a pull-up of a storage node while guaranteeing invertibility of potential of a storage node when writing. <P>SOLUTION: A well potential control part 13 drops N well potential or raises power supply potential of P channel field effect transistors M1 and M2 of a memory cell MC in the timing when the potential of a word line WL shifts to a low level from a high level in a writing cycle. <P>COPYRIGHT: (C)2011,JPO&INPIT |
