| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce current consumption in write operation. <P>SOLUTION: The semiconductor memory device includes a phase change element RP, and a memory cell transistor MN0 that controls data write and read to/from the phase change element RP. The memory cell transistor MN0 supplies a current to the phase change element RP based on a boosting potential VPS in a read operation mode. In a write operation mode, the memory cell transistor supplies a current based on the boosting potential VPS, and subsequently supplies a current based on a boosting potential VPP higher than the boosting potential VPS. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
