发明名称 Systems and methods for super-threading
摘要 In one embodiment of the invention, a method is disclosed including receiving a netlist of an integrated circuit design; executing a first copy of an integrated circuit design program with a first processor associated with a first memory space to independently perform work on a first portion of the integrated circuit design; and executing a second copy of the integrated circuit design program with a second processor associated with a second memory space to independently perform work on a second portion of the integrated circuit design; wherein the second memory space is independent of the first memory space.
申请公布号 US7913194(B1) 申请公布日期 2011.03.22
申请号 US20070756157 申请日期 2007.05.31
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 BAYLOR DENIS
分类号 G06F17/50 主分类号 G06F17/50
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