发明名称 Digitale Datenverschluesselungsschaltung zur verbesserten Fehlervermeidung
摘要 The output of a digital encoder is delivered to a digital data scrambler prior to being encoded as a multilevel (e.g., quaternary) signal for transmission. The digital input to the scrambler is operated on in a deterministically randomized manner which results in a digital output that is modified so as to insure the virtual elimination of unwanted DC shift in the multilevel signal. At the receiving end of the transmission facility, the inverse operation, again deterministic, returns the received digital signal to its original form prior to the decoding operation. In the preferred embodiment, the scrambler (and descrambler) comprises a one-cell feedback shift register with a modulo-2 adder in the feedback coupling.
申请公布号 DE2130443(A1) 申请公布日期 1971.12.30
申请号 DE19712130443 申请日期 1971.06.19
申请人 WESTERN ELECTRIC CO.INC. 发明人 ASTOR MILDONIAN JUN.,HARRY
分类号 H04L25/03;H04L25/34;H04L25/48 主分类号 H04L25/03
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