| 摘要 |
A semiconductor integrated circuit (100) according to the present invention includes a plurality of reconfigurable cores (101) arranged separately from each other in a matrix, and a first group of register circuits (102) formed between a first and second reconfigurable cores included in the reconfigurable cores (101). Each of the reconfigurable cores (101) operates synchronously with clock signals and has a logic reconfiguration function, and includes a plurality of logic elements (201) that implements predetermined logic and programmable wiring (202 and 203) that interconnects the plurality of logic elements (201). The first group of register circuits (102) temporarily holds output from the first reconfigurable core and transfers the output to the second reconfigurable core.
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