发明名称 EVALUATION METHOD OF VIA HOLE FOR PRINTED CIRCUIT BOARD AND TEST BOARD THEREOF
摘要 PURPOSE: A method for evaluating a via hole of a printed circuit board and manufacturing a test board are provided to obtain various optimum process conditions by nondestructive inspection, thereby reducing costs and time for research and development. CONSTITUTION: A plurality of copper foil pads is repetitively arranged on both sides of a copper foil circuit. The copper foil pads have a shape that a plurality of rectangular pads is arranged. Rectangular copper foil pads(10a,10b,10c) of an upper side are overlapped with rectangular copper foil pads(30a,30b,30c) of a lower side. Solders(50) are formed on a copper pad of an end of an upper side of a core layer and a copper pad of the other end of a lower end. Via holes(100a,100b,100c,100d,100e) penetrate an insulating layer(90,100) and a core layer.
申请公布号 KR20110023924(A) 申请公布日期 2011.03.09
申请号 KR20090081705 申请日期 2009.09.01
申请人 DAE DUCK ELECTRONICS CO., LTD. 发明人 KIM, SANG JIN;CHO, WON JIN
分类号 H05K3/40;G01B11/24;H05K13/08 主分类号 H05K3/40
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