发明名称 Method and system for synchronizing parallel engines in a graphics processing unit
摘要 A method and system are disclosed for synchronizing two or more engines in a graphics processing unit (GPU). When issuing a command to an engine, a central processing unit (CPU) writes an event value representing the command into an element of an event memory associated with the engine. After executing the command, the engine modifies the content of the event memory in order to recognize the completion of the command execution. The CPU acquires the command execution status by reading the modified content of the event memory. With precise knowledge of the command execution status, the CPU can issue commands to various engines independently, hence the engines can run parallel.
申请公布号 US7903120(B2) 申请公布日期 2011.03.08
申请号 US20060581973 申请日期 2006.10.17
申请人 VIA TECHNOLOGIES, INC. 发明人 ZHANG GUOFENG
分类号 G06T1/00;G06F15/80;G06T15/00;G09G5/36 主分类号 G06T1/00
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