发明名称 CONCENTRIC VIAS IN ELECTRONIC SUBSTRATE
摘要 <p>A multiwall via structure in an electronic substrate having multiple conductive layers. The multiwall via structure includes an outer via coupled to a pair of the conductive layers, an inner via within the outer via and coupled to the same pair of conductive layers, and a dielectric layer between the inner and outer vias. In various embodiments, the pair of conductive layers can be inner conductive layers or outer conductive layers of the electronic substrate. In other embodiments, a method of preparing a multiwall via structure is provided.</p>
申请公布号 KR20110020941(A) 申请公布日期 2011.03.03
申请号 KR20117001759 申请日期 2009.06.19
申请人 QUALCOMM INCORPORATED 发明人 CHANDRASEKARAN ARVIND
分类号 H05K3/40;H05K3/46 主分类号 H05K3/40
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