发明名称 WAFER LEVEL PACKAGING
摘要 Through vias in a substrate are formed by creating a trench in a top side of the substrate and at least one trench in the back side of the substrate. The sum of the depths of the trenches at least equals the height of the substrate. The trenches cross at intersections, which accordingly form the through vias from the top side to the back side. The through vias are filled with a conductor to form contacts on both sides and the edge of the substrate. Contacts on the backside are formed at each of the trench. The through vias from the edge contacts. Traces connect bond pads to the conductor in the through via. Some traces are parallel to the back side traces. Some traces are skew to the back side traces. The substrate is diced to form individual die.
申请公布号 US2011018143(A1) 申请公布日期 2011.01.27
申请号 US20100898896 申请日期 2010.10.06
申请人 发明人 CHUA SWEE KWANG;BOON SUAN JEUNG;CHIA YONG POO;LOO NEO YONG
分类号 H01L23/498;H01L21/301;H01L21/768;H01L23/48 主分类号 H01L23/498
代理机构 代理人
主权项
地址